It appears that AMD’s alleged Medusa Point Zen 6 APU has surfaced on Geekbench. Interestingly, the repository shows an interesting core configuration and cluster formation.
According to the Geekbench listing, the Zen 6 Medusa Point showcases a 10-core, 20-thread configuration for the CPU, and that it is divided into two clusters: four Zen 6 cores and six Zen 6c cores. To explain the difference between the two, think of the Zen 6c cores as the equivalent to Intel’s E-Cores, albeit having a different usage.
Geekbench 7.1.0 for Windows AVX2https://t.co/DPdOkP7T2M pic.twitter.com/pKbTFE1sgM
Each core is fitted with 32KB of L1 instruction cache, 48KB of L1 data cache, 1MB L2 cache, but a 16MB L3 Cache shared across all 10 cores. Additionally, the repository indicates a 2GHz base clock, but weirdly enough, the boost clock is lower, although this may be a misreading of early silicon, rather than the actual speed.
